- Dec 18, 2012
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Andrew Trick authored
llvm-svn: 170449
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Jakob Stoklund Olesen authored
The normal insert() function takes an MBB::iterator position, and inserts a stand-alone MachineInstr as before. The insert() function that takes an MBB::instr_iterator position can insert instructions inside a bundle, and will now update the bundle flags correctly when that happens. When the insert position is between two bundles, it is unclear whether the instruction should be appended to the previous bundle, prepended to the next bundle, or stand on its own. The MBB::insert() function doesn't bundle the instruction in that case, use the MIBundleBuilder class for that. llvm-svn: 170437
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Hal Finkel authored
A register can be associated with several distinct register classes. For example, on PPC, the floating point registers are each associated with both F4RC (which holds f32) and F8RC (which holds f64). As a result, this code would fail when provided with a floating point register and an f64 operand because it would happen to find the register in the F4RC class first and return that. From the F4RC class, SDAG would extract f32 as the register type and then assert because of the invalid implied conversion between the f64 value and the f32 register. Instead, search all register classes. If a register class containing the the requested register has the requested type, then return that register class. Otherwise, as before, return the first register class found that contains the requested register. llvm-svn: 170436
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Jakob Stoklund Olesen authored
Most code is oblivious to bundles and uses the MBB::iterator which only visits whole bundles. MBB::erase() operates on whole bundles at a time as before. MBB::remove() now refuses to remove bundled instructions. It is not safe to remove all instructions in a bundle without deleting them since there is no way of returning pointers to all the removed instructions. MBB::remove_instr() and MBB::erase_instr() will now update bundle flags correctly, lifting individual instructions out of bundles while leaving the remaining bundle intact. The MachineInstr convenience functions are updated so eraseFromParent() erases a whole bundle as before eraseFromBundle() erases a single instruction, leaving the rest of its bundle. removeFromParent() refuses to operate on bundled instructions, and removeFromBundle() lifts a single instruction out of its bundle. These functions will no longer accidentally split or coalesce bundles - bundle flags are updated to preserve the existing bundling, and explicit bundleWith* / unbundleFrom* functions should be used to change the instruction bundling. This API update is still a work in progress. I am going to update APIs first so they maintain bundle flags automatically when possible. Then I'll add stricter verification of the bundle flags. llvm-svn: 170384
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- Dec 17, 2012
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Patrik Hagglund authored
TargetLowering::getRegClassFor). Some isSimple() guards were missing, or getSimpleVT() were hoisted too far, resulting in asserts on valid LLVM assembly input. llvm-svn: 170336
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Craig Topper authored
llvm-svn: 170298
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- Dec 16, 2012
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Dmitri Gribenko authored
from some other unrelated header. Patch by Kai. llvm-svn: 170284
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Reed Kotler authored
Mips16 is really a processor decoding mode (ala thumb 1) and in the same program, mips16 and mips32 functions can exist and can call each other. If a jal type instruction encounters an address with the lower bit set, then the processor switches to mips16 mode (if it is not already in it). If the lower bit is not set, then it switches to mips32 mode. The linker knows which functions are mips16 and which are mips32. When relocation is performed on code labels, this lower order bit is set if the code label is a mips16 code label. In general this works just fine, however when creating exception handling tables and dwarf, there are cases where you don't want this lower order bit added in. This has been traditionally distinguished in gas assembly source by using a different syntax for the label. lab1: ; this will cause the lower order bit to be added lab2=. ; this will not cause the lower order bit to be added In some cases, it does not matter because in dwarf and debug tables the difference of two labels is used and in that case the lower order bits subtract each other out. To fix this, I have added to mcstreamer the notion of a debuglabel. The default is for label and debug label to be the same. So calling EmitLabel and EmitDebugLabel produce the same result. For various reasons, there is only one set of labels that needs to be modified for the mips exceptions to work. These are the "$eh_func_beginXXX" labels. Mips overrides the debug label suffix from ":" to "=." . This initial patch fixes exceptions. More changes most likely will be needed to DwarfCFException to make all of this work for actual debugging. These changes will be to emit debug labels in some places where a simple label is emitted now. Some historical discussion on this from gcc can be found at: http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html llvm-svn: 170279
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- Dec 15, 2012
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Eric Christopher authored
Make emitDIE public accordingly. No functional change. llvm-svn: 170258
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Eric Christopher authored
llvm-svn: 170257
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- Dec 14, 2012
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Patrik Hagglund authored
EVT. llvm-svn: 170183
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Jakob Stoklund Olesen authored
The new API is higher level than just manipulating the bundle flags directly, and the setIsInsideBundle() function will disappear soon. llvm-svn: 170159
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- Dec 13, 2012
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David Blaikie authored
This is the LLVM portion of r170154. llvm-svn: 170156
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Patrik Hagglund authored
llvm-svn: 170148
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Patrik Hagglund authored
EVT. Accordingly, change RegDefIter to contain MVTs instead of EVTs. llvm-svn: 170140
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Patrik Hagglund authored
Accordingly, add helper funtions getSimpleValueType (in parallel to getValueType) in SDValue, SDNode, and TargetLowering. This is the first, in a series of patches. This is the second attempt. In the first attempt (r169837), a few getSimpleVT() were hoisted too far, detected by bootstrap failures. llvm-svn: 170104
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Eric Christopher authored
section to help prep some code to be split about. llvm-svn: 170088
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Evan Cheng authored
Fix a bug in DAGCombiner::MatchBSwapHWord. Make sure the node has operands before referencing them. rdar://12868039 llvm-svn: 170078
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- Dec 12, 2012
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Pedro Artigas authored
Make the MCStreamer have a reset method and call that after finalization of the asm printer, also changed MCContext to a single reset only method for simplicity as requested on the list llvm-svn: 170041
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Evan Cheng authored
load / store pair. It's not legal to use a wider load than the size of the remaining bytes if it's the first pair of load / store. llvm-svn: 170018
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Evan Cheng authored
mention the inline memcpy / memset expansion code is a mess? This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset. The first indicates whether it is expanding a memset or a memcpy / memmove. The later is whether the memset is a memset of zero. It's totally possible (likely even) that targets may want to do different things for memcpy and memset of zero. llvm-svn: 169959
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Evan Cheng authored
Also added more comments to explain why it is generally ok to return true. - Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to be true for loaded source (memcpy) or zero constants (memset). The poor name choice is probably some kind of legacy issue. llvm-svn: 169954
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Manman Ren authored
rdar://12838504 llvm-svn: 169951
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Evan Cheng authored
f64 load / store on non-SSE2 x86 targets. llvm-svn: 169944
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Evan Cheng authored
ScalarTargetTransformInfo::getIntImmCost() instead. "Legal" is a poorly defined term for something like integer immediate materialization. It is always possible to materialize an integer immediate. Whether to use it for memcpy expansion is more a "cost" conceern. llvm-svn: 169929
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- Dec 11, 2012
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Eric Christopher authored
llvm-svn: 169907
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Joel Jones authored
llvm-svn: 169880
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Patrik Hagglund authored
llvm-svn: 169854
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Patrik Hagglund authored
instead of EVTs. llvm-svn: 169851
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Patrik Hagglund authored
MVTs, instead of EVTs. Accordingly, add bitsLT (and similar) to MVT. llvm-svn: 169850
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Patrik Hagglund authored
from EVT. llvm-svn: 169849
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Patrik Hagglund authored
EVTs. llvm-svn: 169848
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Patrik Hagglund authored
EVTs. llvm-svn: 169847
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Patrik Hagglund authored
of EVT. llvm-svn: 169845
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Patrik Hagglund authored
instead of EVTs. llvm-svn: 169844
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Patrik Hagglund authored
llvm-svn: 169843
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Patrik Hagglund authored
EVT. llvm-svn: 169842
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Patrik Hagglund authored
llvm-svn: 169841
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Patrik Hagglund authored
llvm-svn: 169840
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Patrik Hagglund authored
llvm-svn: 169839
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