llvm-svn: 129296

it is obvious that it should be included.

llvm-svn: 129295

Fix another using-CPSR-twice bug in my ADCS/SBCS cleanups, and make proper use of the Commutable bit.

llvm-svn: 129294

llvm-svn: 129293

LiveIntervals::findLiveInMBBs has to do a full binary search for each segment.

llvm-svn: 129292

header file cstdio was added as an include.

llvm-svn: 129291

llvm-svn: 129288

llvm-svn: 129287

invalid instructions.

llvm-svn: 129286

disassembler API.  Hooked this up to the ARM target so such tools as Darwin's
otool(1) can now print things like branch targets for example this:
  blx _puts
instead of this:
  blx #-36
And even print the expression encoded in the Mach-O relocation entried for
things like this:
  movt r0, :upper16:((_foo-_bar)+1234)

llvm-svn: 129284

Both coalescing and register allocation already check aliases for interference,
so these extra segments are only slowing us down.

This speeds up both linear scan and the greedy register allocator.

llvm-svn: 129283

This particularly helps with the initial transfer of fixed intervals.

llvm-svn: 129277

llvm-svn: 129276

In particular, don't repeatedly recompute the PIC base live range after rematerialization.

llvm-svn: 129275

Patch by arrowdodger!

llvm-svn: 129274

was always a User.

llvm-svn: 129272

llvm-svn: 129271

an odd number.

llvm-svn: 129270

llvm-svn: 129268

llvm-svn: 129267

--- Reverse-merging r129235 into '.':
D    test/Feature/bb_attrs.ll
U    include/llvm/BasicBlock.h
U    include/llvm/Bitcode/LLVMBitCodes.h
U    lib/VMCore/AsmWriter.cpp
U    lib/VMCore/BasicBlock.cpp
U    lib/AsmParser/LLParser.cpp
U    lib/AsmParser/LLLexer.cpp
U    lib/AsmParser/LLToken.h
U    lib/Bitcode/Reader/BitcodeReader.cpp
U    lib/Bitcode/Writer/BitcodeWriter.cpp

llvm-svn: 129259

llvm-svn: 129248

Patch by arrowdodger!

llvm-svn: 129247

llvm-svn: 129245

Suggested by Maël Hörz.

llvm-svn: 129237

* Add a "landing pad" attribute to the BasicBlock.
* Modify the bitcode reader and writer to handle said attribute.

Later: The verifier will ensure that the landing pad attribute is used in the
appropriate manner. I.e., not applied to the entry block, and applied only to
basic blocks that are branched to via a `dispatch' instruction.

(This is a work-in-progress.)

llvm-svn: 129235

isEqual of its members, not operator==.

llvm-svn: 129233

LLVMCC_EMITIR_FLAG is already either -emit-llvm or -fplugin-arg-dragonegg-emit-ir, so don't add an extra leading -.  Clang doesn't accept --emit-llvm.

llvm-svn: 129232

llvm-svn: 129229

InstAlias doesn't allow matching immediate operands, so we have to write
C++ code to do this.

llvm-svn: 129223

for pointing this out

llvm-svn: 129217

llvm-svn: 129214

And don't append the name over and over again in the loop.

llvm-svn: 129210

llvm-svn: 129209

FIXME: The logo handling in ReleaseNotes.html
llvm-svn: 129208

is an array of structures doesn't imply it's a ConstantArray of
ConstantStruct.

llvm-svn: 129207

llvm-svn: 129203

delete the instruction pointed to by CGP's current instruction
iterator, leading to a crash on the testcase.  This fixes PR9578.

llvm-svn: 129200

Switch lowering probably shouldn't be using FP for this.  This resolves PR9581.

llvm-svn: 129199

it's completely safe to cache the AST across LICM runs even with this fix,
but this fix can't hurt.

llvm-svn: 129198