Commits · ffd48e3c27b2dc92629acb27d1cd5beb57b4cfbf · Roger Ferrer / llvm-epi-0.8 · GitLab

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Nov 08, 2017
- Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering · 3f833edc
  David Blaikie authored Nov 08, 2017
  3f833edc
Oct 11, 2017
- CodeGen: Minor cleanups to use MachineInstr::getMF. NFC · fdf9bf4f
  Justin Bogner authored Oct 10, 2017
  fdf9bf4f
Jul 26, 2017
- This patch returns proper value to indicate the case when instruction... · d1fefa3d
  Andrew V. Tischenko authored Jul 26, 2017
  d1fefa3d
Jun 06, 2017
- Fix spelling mistake in getRThroughput static function names. NFCI. · 3446ff4d
  Simon Pilgrim authored Jun 06, 2017
  3446ff4d
- Sort the remaining #include lines in include/... and lib/.... · 6bda14b3
  Chandler Carruth authored Jun 06, 2017
  6bda14b3
Apr 14, 2017
- This patch closes PR#32216: Better testing of schedule model instruction latencies/throughputs. · 75745d0c
  Andrew V. Tischenko authored Apr 14, 2017
  75745d0c
Mar 27, 2017
- Improve machine schedulers for in-order processors · 3d594370
  Javed Absar authored Mar 27, 2017
  3d594370
Feb 27, 2017
- [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). · fa912a71
  Eugene Zelenko authored Feb 27, 2017
  fa912a71
Aug 24, 2016
- TargetSchedule: Do not consider subregister definitions as reads. · 3a133159
  Matthias Braun authored Aug 24, 2016
  3a133159
Jun 30, 2016
- CodeGen: Use MachineInstr& in TargetInstrInfo, NFC · 9cfc75c2
  Duncan P. N. Exon Smith authored Jun 30, 2016
  9cfc75c2
Jun 21, 2016
- [TargetSchedule] Use 'isOutOfOrder' as possible to avoid magic number. NFC. · 11811923
  Junmo Park authored Jun 21, 2016
  11811923
Feb 23, 2016
- CodeGen: TII: Take MachineInstr& in predicate API, NFC · 6307eb55
  Duncan P. N. Exon Smith authored Feb 23, 2016
  6307eb55
Jan 05, 2016
- [MISched] Explanatory error message when machine model is not complete. NFC · 4a9a4e19
  MinSeong Kim authored Jan 05, 2016
  4a9a4e19
Jul 17, 2015
- Use llvm_unreachable() instead of report_fatal_error() if the machine model is incomplete · 244a6773
  Matthias Braun authored Jul 17, 2015
  244a6773
May 14, 2015
- Turn effective assert(0) into llvm_unreachable · 7a247f70
  Matthias Braun authored May 14, 2015
  7a247f70
- TargetSchedule: factor out common code; NFC · 42e1e66e
  Matthias Braun authored May 14, 2015
  42e1e66e
Oct 14, 2014
- Remove unnecessary TargetMachine.h includes. · 307c2cb2
  Eric Christopher authored Oct 14, 2014
  307c2cb2
Sep 02, 2014
- Change MCSchedModel to be a struct of statically initialized data. · 11759457
  Pete Cooper authored Sep 02, 2014
  11759457
Aug 05, 2014
- Have MachineFunction cache a pointer to the subtarget to make lookups · fc6de428
  Eric Christopher authored Aug 05, 2014
  fc6de428
Aug 04, 2014
- Remove the TargetMachine forwards for TargetSubtargetInfo based · d913448b
  Eric Christopher authored Aug 04, 2014
  d913448b
Aug 03, 2014
- MachineCombiner Pass for selecting faster instruction · 5e1207e5
  Gerolf Hoflehner authored Aug 03, 2014
  5e1207e5
Jun 27, 2014
- Revert "Introduce a string_ostream string builder facilty" · e69170a1
  Alp Toker authored Jun 26, 2014
  e69170a1
Jun 26, 2014
- Introduce a string_ostream string builder facilty · 61471738
  Alp Toker authored Jun 26, 2014
  61471738
Sep 30, 2013
- IfConverter: Use TargetSchedule for instruction latencies · d2f96b91
  Arnold Schwaighofer authored Sep 30, 2013
  d2f96b91
Sep 25, 2013
- Mark the x86 machine model as incomplete. PR17367. · b6854d80
  Andrew Trick authored Sep 25, 2013
  b6854d80
Jun 17, 2013
- MI-Sched: handle ReadAdvance latencies as used by Swift. · 5d486186
  Andrew Trick authored Jun 17, 2013
  5d486186
Jun 15, 2013
- Machine Model: Add MicroOpBufferSize and resource BufferSize. · de2109eb
  Andrew Trick authored Jun 15, 2013
  de2109eb
Apr 13, 2013
- MI-Sched cleanup. If an instruction has no valid sched class, do not attempt... · be2bccbc
  Andrew Trick authored Apr 13, 2013
  be2bccbc
Mar 16, 2013
- Change the default latency for implicit defs. · 6057017c
  Andrew Trick authored Mar 16, 2013
  6057017c
Dec 03, 2012
- Use the new script to sort the includes of every file under lib. · ed0881b2
  Chandler Carruth authored Dec 03, 2012
  ed0881b2
Nov 06, 2012
- misched: TargetSchedule interface for machine resources. · e96390ea
  Andrew Trick authored Nov 06, 2012
  e96390ea
Oct 17, 2012
- misched: Better handling of invalid latencies in the machine model · 0b1d8d04
  Andrew Trick authored Oct 17, 2012
  0b1d8d04
Oct 11, 2012
- misched: Handle "transient" non-instructions. · 5f35afb0
  Andrew Trick authored Oct 11, 2012
  5f35afb0
Oct 10, 2012
- misched: fall-back to a target hook for instr bundles. · c334bd45
  Andrew Trick authored Oct 10, 2012
  c334bd45
- misched: Use the TargetSchedModel interface wherever possible. · dd79f0fc
  Andrew Trick authored Oct 10, 2012
  dd79f0fc
- misched: Add computeInstrLatency to TargetSchedModel. · 780fae8c
  Andrew Trick authored Oct 09, 2012
  780fae8c
- misched: Allow flags to disable hasInstrSchedModel/hasInstrItineraries for... · cfcf5202
  Andrew Trick authored Oct 09, 2012
  cfcf5202
Oct 04, 2012
- Enable -schedmodel, but prefer itineraries until we have more benchmark data. · 8abcf4df
  Andrew Trick authored Oct 04, 2012
  8abcf4df
Sep 18, 2012
- TargetSchedule: cleanup computeOperandLatency logic & diagnostics. · f2b70d9f
  Andrew Trick authored Sep 18, 2012
  f2b70d9f
- TargetSchedModel API. Implement latency lookup, disabled. · 6e6d597b
  Andrew Trick authored Sep 18, 2012
  6e6d597b