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Commit 0449678b authored by Greg Clayton's avatar Greg Clayton
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<rdar://problem/13384282> 

As much as I hate to leave this hacky code in that adds some d and q registers to ARM registers, I must leave it in.

The code is now fixed to not just assume ANY arm target will have registers in a certain order. We now verify the common regs are the same name and byte size before adding the d and q regs.

llvm-svn: 176752
parent 03aed11c
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