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Commit 0e01c3d2 authored by sstwcw's avatar sstwcw
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[clang-format] More work on space around operators in Verilog

before:
```
(opcode *>o1) = 6.1;
a inside{b, c};
x = { >> {j}};
```

after:
```
(opcode *> o1) = 6.1;
a inside {b, c};
x = {>>{j}};
```

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D146403
parent b48e7c2d
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