[InstCombine] reduce compare of signbits of 2 values, signed variant

(X s>> BitWidth - 1) == sext (Y s> -1) --> (X ^ Y) < 0
(X s>> BitWidth - 1) != sext (Y s> -1) --> (X ^ Y) > -1

This is the same logic as:
7cbfc39c
...extended to deal with "signed" cast+shift instructions.

https://alive2.llvm.org/ce/z/LLidya