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Commit 22c017f0 authored by Bradley Smith's avatar Bradley Smith
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[AArch64][NEON] Match (or (and -a b) (and (a+1) b)) => bit select



With this patch vbslq_f32(vnegq_s32(a), b, c) lowers to a BIT instruction.

Co-authored-by: default avatarPaul Walker <paul.walker@arm.com>

Differential Revision: https://reviews.llvm.org/D100304
parent ecf93a71
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