[M68k] Optimize for overflow arithmetics that will never overflow
We lower overflow arithmetics to its M68kISD counterparts that produce results of {i16/i32, i8} in which the second resut represents CCR. In the event where we're certain there won't be an overflow, for instance 8 & 16-bit multiplications, we simply use zero in replacement of the second result. This patch replaces M68kISD::CMOV that takes this kind of zero or all-ones CCR as condition value with its corresponding operand value.
Loading
Please sign in to comment