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Commit 2c80e4c7 authored by Abderrazek Zaafrani's avatar Abderrazek Zaafrani
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[AArch64] Avoid SIMD interleaved store instruction for Exynos. 

Replace interleaved store instructions by equivalent and more efficient instructions based on latency cost model.
Https://reviews.llvm.org/D38196

llvm-svn: 320123
parent bf0ad435
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