[InstCombine] reduce smul.ov with i1 types to 'and'
https://alive2.llvm.org/ce/z/5tLkW6 There's still a miscompile bug as shown in issue #59876 / D141214 .
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https://alive2.llvm.org/ce/z/5tLkW6 There's still a miscompile bug as shown in issue #59876 / D141214 .