Skip to content
Commit 33274980 authored by Duncan Sands's avatar Duncan Sands
Browse files

Change the SREM case to match the logic in the IR version ComputeMaskedBits. 

llvm-svn: 94805
parent 297a494f
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment