[SystemZ] "Generic" vector assembler instructions shoud clobber CC

There are several vector instructions which may or may not set the
condition code register, depending on the value of an argument.

For codegen, we use two versions of the instruction, one that sets
CC and one that doesn't, which hard-code appropriate values of that
argument.  But we also have a "generic" version of the instruction
that is used for the assembler/disassembler.  These generic versions
should always be considered to clobber CC just to be safe.

llvm-svn: 349761