[PPC64] Fix offset checks on rel24 call relocations.

Adjusted the range check on a call instruction from 24 bits signed to
26 bits signed. While the instruction only encodes 24 bits, the target is
assumed to be 4 byte aligned, and the value that is encoded in the instruction
gets shifted left by 2 to form the offset. Also added a check that the offset is
indeed at least 4 byte aligned.

Differential Revision: https://reviews.llvm.org/D53401

llvm-svn: 344747