[RISCV] Add a special case to treat riscv-v-vector-bits-min=-1 as meaning use Zvl*b value.
riscv-v-vector-bits-min is primarily used to opt-in to the autovectorizer. The vector width can be determined from Zvl*b. This patch adds support treating -1 as meaning use Zvl*b so we can still opt-in to autovectorization without needing to repeat a vector width already given by Zvl*b or -mcpu. Reviewed By: reames Differential Revision: https://reviews.llvm.org/D124960
Loading
Please sign in to comment