Skip to content
Commit 471f2cff authored by Simon Pilgrim's avatar Simon Pilgrim
Browse files

[X86] CVTTSS2SI64rm has the same scheduler def as (V)CVTSS2SI64rm 

None of Haswell/Broadwell/Skylake/Icelake treat CVTTSS2SI64rm differently from CVTSS2SI64rm (or the AVX variants)

Confirmed with Agner, uops.info and Intel AoM
parent c8f47925
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment