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Commit 4af74496 authored by Michael Kuperstein's avatar Michael Kuperstein
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[X86][Haswell][SchedModel] Fix WriteMULm latency. 

The latency for the WriteMULm class was set to 4, which is actually lower than the latency for WriteMULr (5). 
A better estimate would be 4 added to WriteMULr, that is, 9.

llvm-svn: 230634
parent b0caac77
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