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Commit 4d2536c8 authored by Jianjian GUAN's avatar Jianjian GUAN
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[RISCV] Enable more builtin for zvfhmin without zvfh

This patch enables some fp16 vector type builtins that don't use fp arithmetic instruction for zvfhmin without zvfh.
Include following builtins:
  vector load/store,
  vector reinterpret,
  vmerge_vvm,
  vmv_v.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D151869
parent edb211cb
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