Skip to content
Commit 4e56aa25 authored by Simon Pilgrim's avatar Simon Pilgrim
Browse files

[X86] Schedule scalar movsx/movzx load+extend ops as WriteLoad instead of WriteALULd

Although some very old x86 hardware would perform the extension as a later stage, every target we have a scheduler for always performs this as part of the load-op (avoid ALU pipes etc.). If anyone wants to model very old hardware they can always override this.

This patch just tags these as WriteLoad directly and removes unnecessary overrides - this cleans up some latency/throughput tests as they aren't being badly modelled as folded ALU ops
parent bff6880a
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment