[RISCV] Add test cases for SRO/SLO with shift amounts masked to bitwidth-1. NFC
The sro/slo instructions ignore extra bits in the shift amount, so we can ignore the mask just like we do for sll, srl, and sra.
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The sro/slo instructions ignore extra bits in the shift amount, so we can ignore the mask just like we do for sll, srl, and sra.