[AArch64] Add asm aliases for MOV, LDR, STR with predicate-as-counter

In the 2022-12 release of the A64 ISA it was updated that the assembler must
also accept predicate-as-counter register names for the source predicate
register and the destination predicate register for:
 * *MOV: Move predicate (unpredicated)*
 * *LDR (predicate): Load predicate register*
 * *STR (predicate): Store predicate register*

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D146311