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Commit 66a49aef authored by Hsiangkai Wang's avatar Hsiangkai Wang
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[RISCV] Implement vsoxseg/vsuxseg intrinsics. 

Define vsoxseg/vsuxseg intrinsics and pseudo instructions.
Lower vsoxseg/vsuxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94940
parent c28bbd97
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