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Commit 673b4ad6 authored by KAWASHIMA Takahiro's avatar KAWASHIMA Takahiro
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[AArch64] Add FP16 instructions to isAssociativeAndCommutative

`-mcpu=` in `llvm/test/CodeGen/AArch64/machine-combiner.ll` is changed
to `neoverse-n2` to use FP16 and SVE/SVE2 instructions. By this, the
register allocation and/or instruction scheduling are slightly changed
and some existing `CHECK` lines need to be updated.

Differential Revision: https://reviews.llvm.org/D139809
parent 4ac51dd5
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