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Commit 6b24bdb4 authored by Craig Topper's avatar Craig Topper
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[RISCV] Remove some vsetvli intrinsics under Zve32*. 

Zve32* does not support SEW=64. Or any LMUL smaller than 32/SEW.

Reviewed By: eopXD

Differential Revision: https://reviews.llvm.org/D135519
parent 50312ea1
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