[clang-format] Indent Verilog struct literal on new line

Before:
```
c = //
'{default: 0};
```

After:
```
c = //
    '{default: 0};
```

If the line has to be broken, the continuation part should be
indented.  Before this fix, it was not the case if the continuation
part was a struct literal.  The rule that caused the problem was added
in 783bac6b.  It was intended for aligning the field labels in
ProtoBuf.  The type `TT_DictLiteral` was only for colons back then, so
the program didn't have to check whether the token was a colon when it
was already type `TT_DictLiteral`.  Now the type applies to more
things including the braces enclosing a dictionary literal.  In
Verilog, struct literals start with a quote.  The quote is regarded as
an identifier by the program.  So the rule for aligning the fields in
ProtoBuf applied to this situation by mistake.

Reviewed By: HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D152623