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Commit 6e0fa292 authored by Stanislav Mekhanoshin's avatar Stanislav Mekhanoshin
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[AMDGPU] Change register type for v32 vectors

When it is AReg_1024 this results in unnecessary copying into
AGPRs of a 32 element vectors even though they are not intended
for an mfma instruction.

Differential Revision: https://reviews.llvm.org/D64815

llvm-svn: 366252
parent ccf22ef9
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