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Commit 6fd0ae39 authored by Simon Pilgrim's avatar Simon Pilgrim
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[X86] combineScalarAndWithMaskSetcc - handle (concat_vectors (and (vYi1 setcc,... 

[X86] combineScalarAndWithMaskSetcc - handle (concat_vectors (and (vYi1 setcc, vYi1 x), undef)) patterns

If one of the AND operands is a setcc then we're implicitly zeroing the upper mask bits

Similar pattern to regressions identified in D127115 (masked comparisons)
parent b883e9f3
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