[AArch64] Update MTE system register encodings

The encodings for the system registers TFSRE0_EL1, TFSR_EL1 TFSR_EL2, TFSR_EL3
and TFSR_EL12 have been changed so that they consistently have CRn=5 and CRm=6
as per https://developer.arm.com/docs/ddi0487/latest.

Differential Revision: https://reviews.llvm.org/D65442

llvm-svn: 369505