[LLDB][RISCV] Add riscv register enums
According to [RISC-V ISA Spec](https://riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf) and [riscv-v-spec](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#3-vector-extension-programmers-model) Reviewed By: DavidSpickett Differential Revision: https://reviews.llvm.org/D130899
Loading
Please sign in to comment