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Commit 78e6507b authored by Craig Topper's avatar Craig Topper
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[X86] Correct the scheduler classes for TAILJMP and TCRETURN CodeGenOnly instructions. 

We had an odd combination of WriteJump applied to some memory
instructions and WriteJumpLd applied to register and immediate
instructions.

Thsi should hopefully assign them all correctly.

llvm-svn: 369599
parent 303bbc3b
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