[RISCV] Enable strict assertions in InsertVSETVLI data flow
These asserts are believed to hold after several recent miscompiles have been fixed. If you see an assertion failure on this change, please toggle the default back and make sure you file a bug with a reproducer. We may have as yet uncaught miscompiles lurking in this code. Differential Revision: https://reviews.llvm.org/D125271
Loading
Please sign in to comment