[InstCombine] fold fake vector insert to bit-logic
bitcast (inselt (bitcast X), Y, 0) --> or (and X, MaskC), (zext Y) https://alive2.llvm.org/ce/z/Ux-662 Similar to D111082 / db231ebd : We want to avoid relatively opaque vector ops on types that are likely supported by the backend as scalar integers. The bitwise logic ops are more likely to allow further combining. We probably want to generalize this to allow a shift too, but that would oppose instcombine's general rule of not creating extra instructions, so that's left as a potential follow-up. Alternatively, we could do that transform in VectorCombine with the help of the TTI cost model. This is part of solving: https://llvm.org/PR52057
Loading
Please sign in to comment