[AMDGPU] Support wwm-reg AV spill pseudos

The wwm register spill pseudos are currently defined for VGPR_32
regclass. It causes a verifier error for gfx908 or above as the
regalloc sometimes restores the values to the vector superclass AV_32.
Fixing it by supporting AV wwm-spill pseudos as well.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D155646