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Commit 8cc9059c authored by Andrea Di Biagio's avatar Andrea Di Biagio
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[InstCombine][X86] Teach how to fold calls to SSE2/AVX2 packed logical shift 

right intrinsics.

A packed logical shift right with a shift count bigger than or equal to the
element size always produces a zero vector. In all other cases, it can be
safely replaced by a 'lshr' instruction.

llvm-svn: 207299
parent 8d039e44
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