[RISCV] Use vfslide1down for build_vectors of non-constant floats

This adds the vfslide1down (and vfslide1up for consistency) nodes. These mostly parallel the existing vslide1down/up nodes. (See note below on instruction semantics.) We then use the vfslide1down in build_vector lowering instead of going through the stack.

The specification is more than a bit vague on the meaning of these instructions. All we're given is "The vfslide1down instruction is defined analogously, but sources its scalar argument from an f register."

We have to combine this with a general note at the beginning of section 10. Vector Arithmetic Instruction Formats which reads: "For floating-point operations, the scalar can be taken from a scalar f register. If FLEN > SEW, the value in the f registers is checked for a valid NaN-boxed value, in which case the least-signicant SEW bits of the f register are used, else the canonical NaN value is used. Vector instructions where any floating-point vector operand’s EEW is not a supported floating-point type width (which includes when FLEN < SEW) are reserved.".

Note that floats are NaN-boxed when D is implemented.

Combining that all together, we're fine as long as the element type matches the vector type - which is does by construction.  We shouldn't have legal vectors which hit the reserved encoding case.  An assert is included, just to be careful.

Differential Revision: https://reviews.llvm.org/D151347