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Commit 94c163c3 authored by Tim Renouf's avatar Tim Renouf
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InstCombineSimplifyDemanded: Allow v3 results for AMDGCN buffer and image intrinsics

This helps to avoid the situation where RA spots that only 3 of the
v4f32 result of a load are used, and immediately reallocates the 4th
register for something else, requiring a stall waiting for the load.

Differential Revision: https://reviews.llvm.org/D58906

Change-Id: I947661edfd5715f62361a02b100f14aeeada29aa
llvm-svn: 356768
parent 056a8ba4
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