[AArch64] Extending lowering of 'zext <Y x i8> %x to <Y x i8X>' to use tbl instructions

Adding support for ZExt lowering for destination types beyond the existing support for (8|16) x i32

Patch for lowering zext instructions to 'tbl' for (8|16)xi8 -> (8|16)xi32 conversions in https://reviews.llvm.org/D120571 is extended to support zext to 'tbl' lowering for Y x i8 to Y x i8X where X > 2 and X < 8, that is, any number of vector elements & any destination element type whose size is a multiple of 8 and lies between 16 & 64 is allowed for this transformation.

Related microbenchmarks are in https://reviews.llvm.org/D136274 & https://reviews.llvm.org/D138059

Differential Revision: https://reviews.llvm.org/D136722