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Commit 9ec61148 authored by Vasileios Kalintiris's avatar Vasileios Kalintiris
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[mips][FastISel] Fix generated code for IR's select instruction.

Summary:
Generate correct code for the select instruction by zero-extending
it's boolean/condition operand to GPR-width. This is necessary because
the conditional-move instructions operate on the whole register.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11506

llvm-svn: 243469
parent a43ce0dc
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