[test, ARM] Fix use of var defined in CHECK-NOT
tries to check for the absence of a sequence of instructions with several CHECK-NOT with one of those directives using a variable defined in another. LLVM test CodeGenPrepare/ARM/sink-add-mul-shufflevector.ll tries to check for the absence of a sequence of instructions with several CHECK-NOT with one of those directives using a variable defined in another. However, CHECK-NOT are checked independently so that is using a variable defined in a pattern that should not occur in the input. The bug was then copied over in Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector-inseltpoison.ll This commit removes the definition and uses of variable to check each line independently, making the check stronger than the current one. Reviewed By: dmgreen Differential Revision: https://reviews.llvm.org/D99597
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