[AArch64] Make CNTPCTSS_EL0 and CNTVCTSS_EL0 system registers read-only

The `CNTPCTSS_EL0` and `CNTVCTSS_EL0` system registers, part of
Armv8.6-A's Enhanced Counter Virtualization extension (FEAT_ECV), are
described as read-only in the Arm ARM. This updates their implementation
to match the spec.

Original patch by Simon Tatham.

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D141398