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Commit bf5748a1 authored by Sanjay Patel's avatar Sanjay Patel
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[x86] fold vector (X > -1) & Y to shift+andn

and (pcmpgt X, -1), Y --> pandn (vsrai X, BitWidth-1), Y

This avoids the -1 constant vector in favor of an arithmetic shift
instruction if it exists (the ISA is still not complete after all
these years...).

We catch this pattern late in combining by matching PCMPGT, so it
should not interfere with more general folds.

Differential Revision: https://reviews.llvm.org/D113603
parent ab6ef587
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