[mlir][AMDGPU] Move to new buffer resource intrinsics

The AMDGPU backend now has buffer resource intrinsics that take a ptr
addrspase (8) instead of a vector<4xi32>, improving LLVM's ability to
reason about their memory behavior. This commit moves MLIR to these
new functions.

Reviewed By: jsjodin

Differential Revision: https://reviews.llvm.org/D157053