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Commit bff34a0a authored by chenglin.bi's avatar chenglin.bi
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[AArch64] Only enable `foldCSELOfCSEl` DAG combine when x != y 

https://alive2.llvm.org/ce/z/Uy_x_b

Fix: https://github.com/llvm/llvm-project/issues/59902

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D141359
parent 069d7d7e
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