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Commit c6f32b32 authored by Jim Grosbach's avatar Jim Grosbach
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ARM: Thumb add(sp plus register) asm constraints. 

Make sure when parsing the Thumb1 sp+register ADD instruction that
the source and destination operands match. In thumb2, just use the
wide encoding if they don't. In Thumb1, issue a diagnostic.

rdar://11219154

llvm-svn: 155748
parent 9d8f6f3d
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