[RISCV] Add Syntacore SCR1 CPU model
SCR1 is available at https://github.com/syntacore/scr1 'syntacore-scr1-base' corresponds to SCR1_CFG_RV32IC_BASE, 'syntacore-scr1-max' corresponds to SCR1_CFG_RV32IMC_MAX. SCR1_CFG_RV32EC_MIN is RV32EC, which is currently unsupported. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D139302
Loading
Please sign in to comment