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Commit cb9ae937 authored by Stanislav Mekhanoshin's avatar Stanislav Mekhanoshin
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[AMDGPU] Define SGPR_NULL64 register. NFCI. 

On gfx10+ null register can be used as both 32 and 64 bit operand.
Define a 64 bit version of the register to use during codegen.

Differential Revision: https://reviews.llvm.org/D127527
parent 7316b0d5
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