[AArch64] Fix schedmodel zero latency moves for Neoverse V2

Model some register-to-register move operations and move immediate
operations as "zero latency moves", as described in the Software
Optimisation Guide (SOG), §4.12:

https://developer.arm.com/documentation/PJDOC-466751330-593177/r0p2/

Differential Revision: https://reviews.llvm.org/D159443