[MLIR][SPIRVToLLVM] Implemented shift conversion pattern

This patch has shift ops conversion implementation. In SPIR-V dialect,
`Shift` and `Base` may have different bit width. On the contrary,
in LLVM dialect both `Base` and `Shift` have to be of the same bit width.
This leads to the following cases:
- if `Base` has the same bit width as `Shift`, the conversion is
  straightforward.
- if `Base` has a greater bit width than `Shift`, shift is sign/zero
  extended first. Then the extended value is passed to the shift.
- otherwise the conversion is considered to be illegal.

Differential Revision: https://reviews.llvm.org/D81546