[AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.

The REINTERPRET_CAST operation generates redundant and and ptrue instructions.
For some instructions, this is redundant, because its inactive lanes are zeroed by construction.
For example. Codegen before:
```
facgt p2.d, p0/z, z4.d, z1.d
ptrue p1.d
and p1.b, p2/z, p2.b, p1.b
```
After:
```
facgt p1.d, p0/z, z4.d, z1.d
```
ref: https://reviews.llvm.org/D129851

Reviewed By:sdesmalen,paulwalker-arm

Differential Revision:https://reviews.llvm.org/D141469