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Roger Ferrer
llvm-epi
Commits
e8e4ef10
Commit
e8e4ef10
authored
12 years ago
by
Akira Hatanaka
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In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if its
second operand is MipsISD::GPRel. llvm-svn: 162584
parent
fd5cf6cf
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llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
+3
-2
3 additions, 2 deletions
llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
llvm/test/CodeGen/Mips/small-section-reserve-gp.ll
+1
-1
1 addition, 1 deletion
llvm/test/CodeGen/Mips/small-section-reserve-gp.ll
with
4 additions
and
3 deletions
llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
+
3
−
2
View file @
e8e4ef10
...
...
@@ -337,8 +337,9 @@ SelectAddr(SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset) {
// Generate:
// lui $2, %hi($CPI1_0)
// lwc1 $f0, %lo($CPI1_0)($2)
if
(
Addr
.
getOperand
(
1
).
getOpcode
()
==
MipsISD
::
Lo
)
{
SDValue
LoVal
=
Addr
.
getOperand
(
1
),
Opnd0
=
LoVal
.
getOperand
(
0
);
if
(
Addr
.
getOperand
(
1
).
getOpcode
()
==
MipsISD
::
Lo
||
Addr
.
getOperand
(
1
).
getOpcode
()
==
MipsISD
::
GPRel
)
{
SDValue
Opnd0
=
Addr
.
getOperand
(
1
).
getOperand
(
0
);
if
(
isa
<
ConstantPoolSDNode
>
(
Opnd0
)
||
isa
<
GlobalAddressSDNode
>
(
Opnd0
)
||
isa
<
JumpTableSDNode
>
(
Opnd0
))
{
Base
=
Addr
.
getOperand
(
0
);
...
...
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llvm/test/CodeGen/Mips/small-section-reserve-gp.ll
+
1
−
1
View file @
e8e4ef10
...
...
@@ -5,7 +5,7 @@
define
i32
@geti
()
nounwind
readonly
{
entry:
; CHECK:
addiu
${{[0-9]+}},
$gp,
%gp_rel(i)
; CHECK:
lw
${{[0-9]+}}, %gp_rel(i)
($gp)
%0
=
load
i32
*
@i
,
align
4
ret
i32
%0
}
...
...
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