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Commit f8df4f4e authored by Chad Rosier's avatar Chad Rosier
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[avx] Define the _mm256_loadu2_xxx and _mm256_storeu2_xxx intrinsics.

From the Intel Optimization Reference Manual, Section 11.6.2.  When data cannot
be aligned or alignment is not known, 16-byte memory accesses may provide better
performance.
rdar://11076953

llvm-svn: 153091
parent d663934b
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